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InstEmitMemoryEx: Barrier after write on ordered store (#3193)

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* InstEmitMemoryEx: Barrier after write on ordered store

* increment ptc version

* 32
This commit is contained in:
merry
2022-03-19 13:32:35 +00:00
committed by GitHub
parent e2ffa5a125
commit df70442c46
3 changed files with 16 additions and 11 deletions
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15
ARMeilleure/Instructions/InstEmitMemoryEx32.cs
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@ -146,13 +146,13 @@ namespace ARMeilleure.Instructions
var exclusive = (accType & AccessType.Exclusive) != 0;
var ordered = (accType & AccessType.Ordered) != 0;
if (ordered)
{
EmitBarrier(context);
}
if ((accType & AccessType.Load) != 0)
{
if (ordered)
{
EmitBarrier(context);
}
if (size == DWordSizeLog2)
{
// Keep loads atomic - make the call to get the whole region and then decompose it into parts
@ -219,6 +219,11 @@ namespace ARMeilleure.Instructions
Operand value = context.ZeroExtend32(OperandType.I64, GetIntA32(context, op.Rt));
EmitStoreExclusive(context, address, value, exclusive, size, op.Rd, a32: true);
}
if (ordered)
{
EmitBarrier(context);
}
}
}