514218ab98
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits ( #225 )
...
* Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions
* Address PR feedback
* Address PR feedback
* Remove another useless temp var
* nit: Alignment
* Replace Context.CurrOp.GetBitsCount() with Op.GetBitsCount()
* Fix encodings and move flag bit test out of the loop
2018-07-14 13:13:02 -03:00
b233ae964f
AInstEmitSimdCvt: Half-precision to single-precision conversion ( #235 )
2018-07-12 15:51:02 -03:00
7ac5f40532
Add scalar variants of FCVTZS/FCVTZU, fix a issue on Ryushader
2018-05-18 14:44:49 -03:00
f9f111bc85
Add intrinsics support ( #121 )
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* Initial intrinsics support
* Update tests to work with the new Vector128 type and intrinsics
* Drop SSE4.1 requirement
* Fix copy-paste mistake
2018-05-11 20:10:27 -03:00
59d1b2ad83
Add MUL (vector by element), fix FCVTN, make svcs use MakeError too
2018-03-05 16:18:37 -03:00
0e343a748d
Add FCVTL and FCVTN instruction (no Half support yet), stub SvcClearEvent
2018-03-05 12:58:56 -03:00
3936c93448
Map heap on heap base region, fix for thread start on homebrew, add FCVTMU and FCVTPU (general) instructions, fix FMOV (higher 64 bits) encodings, improve emit code for FCVT* (general) instructions
2018-02-23 21:59:38 -03:00
62b827f474
Split main project into core,graphics and chocolarm4 subproject ( #29 )
2018-02-20 17:09:23 -03:00
