gdkchan dcce407071 Lower precision of estimate instruction results to match Arm behavior (#1943) ...

* Lower precision of estimate instruction results to match Arm behavior

* PTC version update

* Nits

2021-01-28 10:23:00 +11:00

..

CodeGen

CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894)

2021-01-20 09:12:33 +11:00

Common

Add a simple Pools Limiter. (#1830)

2021-01-12 19:04:02 +01:00

Decoders

Implement PRFM (register variant) as NOP (#1956)

2021-01-26 16:09:27 +11:00

Diagnostics

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Instructions

Lower precision of estimate instruction results to match Arm behavior (#1943)

2021-01-28 10:23:00 +11:00

IntermediateRepresentation

CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894)

2021-01-20 09:12:33 +11:00

Memory

Clear JIT cache on exit (#1518)

2020-12-16 17:07:42 -03:00

State

CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817)

2021-01-04 23:45:54 +01:00

Translation

Lower precision of estimate instruction results to match Arm behavior (#1943)

2021-01-28 10:23:00 +11:00

ARMeilleure.csproj

infra: Migrate to .NET 5 (#1694)

2020-11-15 19:27:15 +01:00

Optimizations.cs

CPU: Implement VFNMS.F32/64 (#1758)

2020-12-03 20:20:02 +01:00

Statistics.cs

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