marcel/Ryujinx
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
d87c5375f1aac092cef7f71b9c1085904b8f78d7
Ryujinx/Ryujinx.Tests/Cpu
History
LDj3SNuD d87c5375f1 Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696) 
* Update CpuTestAlu.cs

* Update CpuTestSimd.cs

* Update CpuTestMov.cs
2019-06-12 09:03:31 -03:00
..
CpuTest.cs
Add Tbl_V Sse opt. with Tests. (#651)
2019-03-23 15:50:19 -03:00
CpuTestAlu.cs
Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
2019-06-12 09:03:31 -03:00
CpuTestAluImm.cs
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
2018-11-01 01:22:09 -03:00
CpuTestAluRs.cs
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
2018-11-01 01:22:09 -03:00
CpuTestAluRx.cs
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
2018-11-01 01:22:09 -03:00
CpuTestBfm.cs
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
2018-11-01 01:22:09 -03:00
CpuTestCcmpImm.cs
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
2018-11-01 01:22:09 -03:00
CpuTestCcmpReg.cs
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
2018-11-01 01:22:09 -03:00
CpuTestCsel.cs
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
2018-11-01 01:22:09 -03:00
CpuTestMisc.cs
Add Tests for instructions Fcvtzs_Gp_Fixed & Fcvtzu_Gp_Fixed, Scvtf_Gp_Fixed & Ucvtf_Gp_Fixed. (#603)
2019-02-23 20:53:27 -03:00
CpuTestMov.cs
Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
2019-06-12 09:03:31 -03:00
CpuTestMul.cs
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
2018-11-01 01:22:09 -03:00
CpuTestSimd.cs
Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
2019-06-12 09:03:31 -03:00
CpuTestSimdCrypto.cs
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
2018-11-01 01:22:09 -03:00
CpuTestSimdCvt.cs
Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662)
2019-04-20 23:07:35 -03:00
CpuTestSimdExt.cs
Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)
2019-03-13 19:23:52 +11:00
CpuTestSimdFcond.cs
Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. (#496)
2018-11-18 00:41:16 -02:00
CpuTestSimdImm.cs
Create CpuTestSimdImm.cs (#608)
2019-03-01 20:12:09 +11:00
CpuTestSimdIns.cs
Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)
2019-03-13 19:23:52 +11:00
CpuTestSimdReg.cs
Add Rshrn_V & Shrn_V Sse opt.. Add Mla_V, Mls_V & Mul_V Sse opt.; add Tests. (#614)
2019-03-13 19:23:52 +11:00
CpuTestSimdRegElem.cs
Add Smlal_Ve, Smlsl_Ve, Smull_Ve, Umlal_Ve, Umlsl_Ve, Umull_Ve Inst.; add Tests. Add Sse Opt. for Trn1/2_V and Uzp1/2_V Inst. Nits. (#566)
2019-01-29 10:54:39 -03:00
CpuTestSimdRegElemF.cs
Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
2018-11-01 01:22:09 -03:00
CpuTestSimdShImm.cs
Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662)
2019-04-20 23:07:35 -03:00
CpuTestSimdTbl.cs
Add Tbl_V Sse opt. with Tests. (#651)
2019-03-23 15:50:19 -03:00