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Emit CIL directly for more SIMD instructions, add UCVTF (vector, scalar) and UZP2, fix XTN (?)

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gdkchan
2018-02-15 01:32:25 -03:00
parent 7c4346685c
commit 7c314eadcf
15 changed files with 674 additions and 1052 deletions
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Ryujinx/OsHle/Svc/SvcThreadSync.cs
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@@ -1,4 +1,3 @@
using ChocolArm64;
using ChocolArm64.State;
using Ryujinx.OsHle.Handles;