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Fixes to memory management
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@@ -1,5 +1,3 @@
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using System.Runtime.CompilerServices;
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namespace Ryujinx.Gpu
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{
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class NsGpuMemoryMgr
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@@ -16,7 +14,7 @@ namespace Ryujinx.Gpu
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private const int PTLvl0Mask = PTLvl0Size - 1;
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private const int PTLvl1Mask = PTLvl1Size - 1;
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private const int PageMask = PageSize - 1;
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private const int PageMask = PageSize - 1;
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private const int PTLvl0Bit = PTPageBits + PTLvl0Bits;
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private const int PTLvl1Bit = PTPageBits;
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@@ -107,6 +105,11 @@ namespace Ryujinx.Gpu
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long Position = 0;
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long FreeSize = 0;
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if (Align < 1)
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{
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Align = 1;
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}
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Align = (Align + PageMask) & ~PageMask;
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while (Position + FreeSize < AddrSize)
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@@ -149,7 +152,6 @@ namespace Ryujinx.Gpu
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return BasePos + (Position & PageMask);
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool HasPTAddr(long Position)
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{
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if (Position >> PTLvl0Bits + PTLvl1Bits + PTPageBits != 0)
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@@ -168,7 +170,6 @@ namespace Ryujinx.Gpu
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return PageTable[L0][L1] != PteUnmapped;
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private long GetPTAddr(long Position)
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{
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long L0 = (Position >> PTLvl0Bit) & PTLvl0Mask;
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@@ -182,7 +183,6 @@ namespace Ryujinx.Gpu
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return PageTable[L0][L1];
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private void SetPTAddr(long Position, long TgtAddr)
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{
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long L0 = (Position >> PTLvl0Bit) & PTLvl0Mask;
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