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https://git.ryujinx.app/ryubing/ryujinx.git
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Refactor attribute handling on the shader generator (#4565)
* Refactor attribute handling on the shader generator * Implement gl_ViewportMask[] * Add back the Intel FrontFacing bug workaround * Fix GLSL transform feedback outputs mistmatch with fragment stage * Shader cache version bump * Fix geometry shader recognition * PR feedback * Delete GetOperandDef and GetOperandUse * Remove replacements that are no longer needed on GLSL compilation on Vulkan * Fix incorrect load for per-patch outputs * Fix build
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@@ -76,11 +76,11 @@ namespace Ryujinx.Graphics.Shader.Instructions
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switch (op.SReg)
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{
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case SReg.LaneId:
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src = Attribute(AttributeConsts.LaneId);
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src = context.Load(StorageKind.Input, IoVariable.SubgroupLaneId);
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break;
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case SReg.InvocationId:
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src = Attribute(AttributeConsts.InvocationId);
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src = context.Load(StorageKind.Input, IoVariable.InvocationId);
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break;
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case SReg.YDirection:
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@@ -88,7 +88,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
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break;
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case SReg.ThreadKill:
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src = context.Config.Stage == ShaderStage.Fragment ? Attribute(AttributeConsts.ThreadKill) : Const(0);
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src = context.Config.Stage == ShaderStage.Fragment ? context.Load(StorageKind.Input, IoVariable.ThreadKill) : Const(0);
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break;
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case SReg.InvocationInfo:
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@@ -101,7 +101,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
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if (context.Config.Stage == ShaderStage.TessellationControl ||
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context.Config.Stage == ShaderStage.TessellationEvaluation)
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{
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src = context.ShiftLeft(Attribute(AttributeConsts.PatchVerticesIn), Const(16));
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src = context.ShiftLeft(context.Load(StorageKind.Input, IoVariable.PatchVertices), Const(16));
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}
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else
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{
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@@ -115,9 +115,9 @@ namespace Ryujinx.Graphics.Shader.Instructions
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break;
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case SReg.TId:
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Operand tidX = Attribute(AttributeConsts.ThreadIdX);
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Operand tidY = Attribute(AttributeConsts.ThreadIdY);
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Operand tidZ = Attribute(AttributeConsts.ThreadIdZ);
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Operand tidX = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(0));
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Operand tidY = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(1));
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Operand tidZ = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(2));
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tidY = context.ShiftLeft(tidY, Const(16));
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tidZ = context.ShiftLeft(tidZ, Const(26));
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@@ -126,39 +126,39 @@ namespace Ryujinx.Graphics.Shader.Instructions
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break;
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case SReg.TIdX:
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src = Attribute(AttributeConsts.ThreadIdX);
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src = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(0));
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break;
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case SReg.TIdY:
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src = Attribute(AttributeConsts.ThreadIdY);
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src = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(1));
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break;
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case SReg.TIdZ:
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src = Attribute(AttributeConsts.ThreadIdZ);
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src = context.Load(StorageKind.Input, IoVariable.ThreadId, null, Const(2));
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break;
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case SReg.CtaIdX:
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src = Attribute(AttributeConsts.CtaIdX);
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src = context.Load(StorageKind.Input, IoVariable.CtaId, null, Const(0));
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break;
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case SReg.CtaIdY:
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src = Attribute(AttributeConsts.CtaIdY);
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src = context.Load(StorageKind.Input, IoVariable.CtaId, null, Const(1));
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break;
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case SReg.CtaIdZ:
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src = Attribute(AttributeConsts.CtaIdZ);
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src = context.Load(StorageKind.Input, IoVariable.CtaId, null, Const(2));
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break;
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case SReg.EqMask:
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src = Attribute(AttributeConsts.EqMask);
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src = context.Load(StorageKind.Input, IoVariable.SubgroupEqMask, null, Const(0));
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break;
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case SReg.LtMask:
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src = Attribute(AttributeConsts.LtMask);
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src = context.Load(StorageKind.Input, IoVariable.SubgroupLtMask, null, Const(0));
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break;
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case SReg.LeMask:
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src = Attribute(AttributeConsts.LeMask);
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src = context.Load(StorageKind.Input, IoVariable.SubgroupLeMask, null, Const(0));
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break;
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case SReg.GtMask:
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src = Attribute(AttributeConsts.GtMask);
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src = context.Load(StorageKind.Input, IoVariable.SubgroupGtMask, null, Const(0));
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break;
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case SReg.GeMask:
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src = Attribute(AttributeConsts.GeMask);
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src = context.Load(StorageKind.Input, IoVariable.SubgroupGeMask, null, Const(0));
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break;
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default:
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