From 1c79a78c09e385f463aa03bb3beba7fe2e8f9d1d Mon Sep 17 00:00:00 2001 From: Rohan Barar <57999059+KernelGhost@users.noreply.github.com> Date: Thu, 31 Jul 2025 12:55:58 +1000 Subject: [PATCH] docs: fix typo in libvirt CPU pinning section --- docs/libvirt.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/libvirt.md b/docs/libvirt.md index 0f0ddc1..d32ef37 100644 --- a/docs/libvirt.md +++ b/docs/libvirt.md @@ -193,7 +193,7 @@ Together, these components form a powerful and flexible virtualization stack, wi Example 1: - CPU cores share the same singular L3 cache, so this cannot be optimised. - - CPU cores utilise different L1 and L2 caches, so isolatng corresponding thread pairs will help improve performance. + - CPU cores utilise different L1 and L2 caches, so isolating corresponding thread pairs will help improve performance. - Thus, if limiting the virtual machine to a maximum of 4 threads, there are 10 possible optimal configurations: - T0+T4 - T1+T5