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Improved CPU pinning documentation
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Rohan Barar
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docs/libvirt.md
105
docs/libvirt.md
@ -124,10 +124,111 @@ Together, these components form a powerful and flexible virtualization stack, wi
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<img src="./libvirt_images/08.png" width="700px"/>
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</p>
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10. (Optional) Configure 'CPU pinning' by following [this excellent guide](https://wiki.archlinux.org/title/PCI_passthrough_via_OVMF#CPU_pinning).
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10. (Optional) Assign specific physical CPU cores to the virtual machine. This can improve performance by reducing context switching and ensuring that the virtual machine's workload consistently uses the same cores, leading to better CPU cache utilisation.
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1. Run `lscpu -e` to determine which L1, L2 and L3 caches are associated with which CPU cores.
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Example 1 (Intel 11th Gen Core i7-1185G7):
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```
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CPU NODE SOCKET CORE L1d:L1i:L2:L3 ONLINE MAXMHZ MINMHZ
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0 0 0 0 0:0:0:0 yes 4800.0000 400.0000
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1 0 0 1 1:1:1:0 yes 4800.0000 400.0000
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2 0 0 2 2:2:2:0 yes 4800.0000 400.0000
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3 0 0 3 3:3:3:0 yes 4800.0000 400.0000
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4 0 0 0 0:0:0:0 yes 4800.0000 400.0000
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5 0 0 1 1:1:1:0 yes 4800.0000 400.0000
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6 0 0 2 2:2:2:0 yes 4800.0000 400.0000
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7 0 0 3 3:3:3:0 yes 4800.0000 400.0000
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```
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- C<sub>0</sub> = T<sub>0</sub>+T<sub>4</sub> → L1<sub>0</sub>+L2<sub>0</sub>+L3<sub>0</sub>
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- C<sub>1</sub> = T<sub>1</sub>+T<sub>5</sub> → L1<sub>1</sub>+L2<sub>1</sub>+L3<sub>0</sub>
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- C<sub>2</sub> = T<sub>2</sub>+T<sub>6</sub> → L1<sub>2</sub>+L2<sub>2</sub>+L3<sub>0</sub>
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- C<sub>3</sub> = T<sub>3</sub>+T<sub>7</sub> → L1<sub>3</sub>+L2<sub>3</sub>+L3<sub>0</sub>
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Example 2 (AMD Ryzen 5 1600):
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```
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CPU NODE SOCKET CORE L1d:L1i:L2:L3 ONLINE MAXMHZ MINMHZ
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0 0 0 0 0:0:0:0 yes 3800.0000 1550.0000
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1 0 0 0 0:0:0:0 yes 3800.0000 1550.0000
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2 0 0 1 1:1:1:0 yes 3800.0000 1550.0000
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3 0 0 1 1:1:1:0 yes 3800.0000 1550.0000
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4 0 0 2 2:2:2:0 yes 3800.0000 1550.0000
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5 0 0 2 2:2:2:0 yes 3800.0000 1550.0000
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6 0 0 3 3:3:3:1 yes 3800.0000 1550.0000
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7 0 0 3 3:3:3:1 yes 3800.0000 1550.0000
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8 0 0 4 4:4:4:1 yes 3800.0000 1550.0000
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9 0 0 4 4:4:4:1 yes 3800.0000 1550.0000
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10 0 0 5 5:5:5:1 yes 3800.0000 1550.0000
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11 0 0 5 5:5:5:1 yes 3800.0000 1550.0000
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```
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- C<sub>0</sub> = T<sub>0</sub>+T<sub>1</sub> → L1<sub>0</sub>+L2<sub>0</sub>+L3<sub>0</sub>
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- C<sub>1</sub> = T<sub>2</sub>+T<sub>3</sub> → L1<sub>1</sub>+L2<sub>1</sub>+L3<sub>0</sub>
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- C<sub>2</sub> = T<sub>4</sub>+T<sub>5</sub> → L1<sub>2</sub>+L2<sub>2</sub>+L3<sub>0</sub>
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- C<sub>3</sub> = T<sub>6</sub>+T<sub>7</sub> → L1<sub>3</sub>+L2<sub>3</sub>+L3<sub>1</sub>
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- C<sub>4</sub> = T<sub>8</sub>+T<sub>9</sub> → L1<sub>4</sub>+L2<sub>4</sub>+L3<sub>1</sub>
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- C<sub>5</sub> = T<sub>10</sub>+T<sub>11</sub> → L1<sub>5</sub>+L2<sub>5</sub>+L3<sub>1</sub>
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2. Select which CPU cores to 'pin'. You should aim to select a combination of CPU cores that minimises sharing of caches between Windows and GNU/Linux.
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Example 1:
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- CPU cores share the same singular L3 cache, so this cannot be optimised.
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- CPU cores utilise different L1 and L2 caches, so isolatng corresponding thread pairs will help improve performance.
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- Thus, if limiting the virtual machine to a maximum of 4 threads, there are 10 possible optimal configurations:
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- T<sub>0</sub>+T<sub>4</sub>
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- T<sub>1</sub>+T<sub>5</sub>
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- T<sub>2</sub>+T<sub>6</sub>
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- T<sub>3</sub>+T<sub>7</sub>
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- T<sub>0</sub>+T<sub>4</sub>+T<sub>1</sub>+T<sub>5</sub>
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- T<sub>0</sub>+T<sub>4</sub>+T<sub>2</sub>+T<sub>6</sub>
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- T<sub>0</sub>+T<sub>4</sub>+T<sub>3</sub>+T<sub>7</sub>
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- T<sub>1</sub>+T<sub>5</sub>+T<sub>2</sub>+T<sub>6</sub>
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- T<sub>1</sub>+T<sub>5</sub>+T<sub>3</sub>+T<sub>7</sub>
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- T<sub>2</sub>+T<sub>6</sub>+T<sub>3</sub>+T<sub>7</sub>
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Example 2:
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- Threads 0-5 utilise one L3 cache whereas threads 6-11 utilise a different L3 cache. Thus, one of these two sets of threads should be pinned to the virtual machine.
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- Pinning and isolating fewer than these (e.g. threads 8-11) would result in the host system making use of the L3 cache in threads 6 and 7, resulting in cache evictions and therefore bad performance.
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- Thus, there are only two possible optimal configurations:
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- T<sub>0</sub>+T<sub>1</sub>+T<sub>2</sub>+T<sub>3</sub>+T<sub>4</sub>+T<sub>5</sub>
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- T<sub>6</sub>+T<sub>7</sub>+T<sub>8</sub>+T<sub>9</sub>+T<sub>10</sub>+T<sub>11</sub>
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3. Prepare and add/modify the following to the `<vcpu>`, `<cputune>` and `<cpu>` sections, adjusting the values to match your selected threads.
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Example 1: The following selects 'T<sub>2</sub>+T<sub>6</sub>+T<sub>3</sub>+T<sub>7</sub>'.
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```xml
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<vcpu placement="static">4</vcpu>
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<cputune>
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<vcpupin vcpu="0" cpuset="2"/>
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<vcpupin vcpu="1" cpuset="6"/>
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<vcpupin vcpu="2" cpuset="3"/>
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<vcpupin vcpu="3" cpuset="7"/>
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</cputune>
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<cpu mode="host-passthrough" check="none" migratable="on">
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<topology sockets="1" dies="1" clusters="1" cores="2" threads="2"/>
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</cpu>
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```
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Example 2: The following selects 'T<sub>6</sub>+T<sub>7</sub>+T<sub>8</sub>+T<sub>9</sub>+T<sub>10</sub>+T<sub>11</sub>'.
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```xml
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<vcpu placement="static">6</vcpu>
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<cputune>
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<vcpupin vcpu="0" cpuset="6"/>
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<vcpupin vcpu="1" cpuset="7"/>
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<vcpupin vcpu="2" cpuset="8"/>
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<vcpupin vcpu="3" cpuset="9"/>
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<vcpupin vcpu="4" cpuset="10"/>
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<vcpupin vcpu="5" cpuset="11"/>
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</cputune>
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<cpu mode="host-passthrough" check="none" migratable="on">
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<topology sockets="1" dies="1" clusters="1" cores="3" threads="2"/>
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</cpu>
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```
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> [!NOTE]
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> CPU pinning involves assigning specific physical CPU cores to a virtual machine. This can improve performance by reducing context switching and ensuring that the VM's workload consistently uses the same cores, leading to better CPU cache utilisation.
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> More information on configuring CPU pinning can be found in [this excellent guide](https://wiki.archlinux.org/title/PCI_passthrough_via_OVMF#CPU_pinning).
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11. Navigate to the `XML` tab, and edit the `<clock>` section to disable all timers except for the hypervclock, thereby drastically reducing idle CPU usage. Once changed, click `Apply`.
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```xml
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